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Senior IC Layout Engineer (27087)

Cambridge
to £80,000 plus benefits
Filled

IC layout design and simulation, RFIC, RF architecture, Cadence toolchain

Help to bring future communications technology into users’ hands as you design and refine the layout for next generation ICs with unique features. Take control of layout design, collaborate with designers on schematics, and contribute to modelling and simulation as part of a focused and award-winning IC team.

You will have:

  • Experience in optimised IC layout, preferably for RFICs, with substrates ideally including SOI.
  • Advanced skills with Cadence EDA software tools.
  • Expertise engineering to meet design rule checks along with LVS and ERC.
  • Ideally, knowledge of RF measurement and characterisation techniques.
  • Drive and an interest in startup-culture, working in a fast paced but good humoured and respectful environment.

The company offers comprehensive benefits including a generous salary, pension contribution, and share options incentives. Theirs is a collaborative culture and there is plenty to do in bringing their unique technologies to market.

Keywords: IC layout, RFIC, SOI, Cadence, EDA, DRC, LVS, ERC, multi-chip module simulations, MCM.

Please note: even if you don’t have exactly the background indicated, do contact us now if this type of job is of interest – we may well have similar opportunities that you would be suited to. And of course, we always get your permission before submitting your CV to a company.